My actual Test Suite

VHDLParser is tested with the following VHDL files.

Feel free to contribute...

 

adder.vhd

and2.vhd

bvadd.vhd

counter.vhd

gates.vhd

io_utils.vhd

jedec.vhd

pal16r8.vhd

stdlogic.vhd

stimulus.vhd

testadder.vhd

test.vhd